PTN3460 Development Notes

The external EEPROM only stores one EDID (0x00 – 0x7F) and configuration registers (0x80 – 0xFF). If external EEPROM is used (DEV_CFG pin = high) in application, then firmware will read EDID from external EEPROM data address 0x00-0x7F to overwrite the EDID 0 in SRAM ,...

IT6251

LVDS RX Support LVDS Input modes: Single Link, Dual Link Support input clock rate up to 165MHz Support input color depth up to 10bit Support De-SSC ( De-Spread Spectrum ) Support Data Mapping: Open LDI / JEIDA , VESA DisplayPort TX DisplayPort 1.1a transmitter...

Displayport Interface Knowledge

Displayport Pin Assignment Pin Name Description 1 ML_Lane 0 + Lane 0 (positive) 2 GND Ground 3 ML_Lane 0 – Lane 0 (negative) 4 ML_Lane 1 + Lane 1 (positive) 5 GND Ground 6 ML_Lane 1 – Lane 1 (negative) 7 ML_Lane 2 + Lane 2 (positive) 8 GND Ground 9 ML_Lane...