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TI DS90C387 Dual LVDS Dual Pixel LVDS Display Interface Transmitter Application Notes


  • Supports SVGA through QXGA panel resolutions
  • 32.5 to 112/170MHz clock support
  • Up to 5.7 Gbps bandwidth





  • The DVI RX output is configurable with pin “PIXS”. When PIXS is Low, RGB data is output on 24 bits (QE[23:0]). When PIXS is High, RGB data is split odd/even on 48-bits. The 4 additional bits are VSYNC, HSYNC, DE, and ODCK.
  • Most panels that receive LVDS that have a resolution of <1400×1050 use 1-channel
  • 1280×800 and 720p usually use 1-channel LVDS with a 70-75MHz pixel clock.
  • 1080p usually uses 2-channel LVDS with a 74.25MHz clock.
  • Set the same clock edge for the two devices. If DVI RX pin “OCK_INV” is High, set LVDS TX pin “CLKSEL” (83B/83C/93A) or “R_FB” (387A) also High. When using the DS90C387A, set pin “DUAL” to High to set the 48:8 mode.